Liquid crystal display devices have been known in the past that comprise a digital signal input terminal and receive a data signal etc. used for displaying images as a digital input. In order to convert the input digital signal to analog signals, such liquid crystal display devices comprise a digital-to-analog converter circuit (DAC) located between the above-mentioned digital signal input terminal and source lines (signal lines) disposed in the columnwise direction of the liquid crystal panel. This DAC is sometimes incorporated into a signal line driver circuit (source driver) and sometimes provided outside of the source driver. The data signals output from the DAC as analog signals are distributed and provided by the source driver as inputs to the source lines.
The DAC output capability is set such that an ideal output waveform is obtained. For instance, among the three types of waveforms respectively shown in FIGS. 6A-6C, the waveform of FIG. 6A is an ideal waveform. By contrast, the waveform of FIG. 6B exhibits considerable rounding of the pulse at the leading edge due to a deficient DAC output. In such cases, the charging of the source lines by the DAC may be deficient, adequate liquid crystal response may not be obtained, and display quality may decline. On the other hand, electric power is wasted if the output waveform looks like the waveform illustrated in FIG. 6C. Accordingly, the parameters of the DAC are set such that the output waveform of the DAC assumes the ideal shape illustrated in FIG. 6A. For instance, in case of an R-2R resistor ladder type DAC, the DAC output capability can be appropriately set by adjusting the magnitude of the bias current.
The output capability of the DACs used for data signals in digital input-type liquid crystal display devices is usually set at manufacture time based on simulation results using average characteristic values (load resistance value and load capacitance value of the video bus line) of liquid crystal panels. Incidentally, in recent years, following an increase in the definition and screen size of liquid crystal panels, multiple DACs used for data signals are sometimes provided in liquid crystal display devices. The larger the number of DACs is, the higher the probability of variation in the capability of the DACs becomes. When the DAC capability considerably deviates from the simulation results, power consumption increases in case of excessive output and display quality declines in case of deficient output.
Accordingly, there has in the past been proposed a DAC that compensates for variation in the output voltage and increases the productivity and yield of liquid crystal display devices by providing a voltage-adding circuit that adds an adjusting voltage to the output voltage of a DAC when low image quality is discovered in the process of inspection at manufacture time (see FIG. 1, Paragraph 0016; in JP2002-217734A).